內嵌式微處理器系統設計與實作---子計畫二：ARM 處理器指令/程式壓縮/解壓縮之設計與實作

Full metadata record

DC Field	Value	Language
dc.contributor.author	鍾崇斌	en_US
dc.contributor.author	CHUNG CHUNG-PING	en_US
dc.date.accessioned	2014-12-13T10:51:12Z	-
dc.date.available	2014-12-13T10:51:12Z	-
dc.date.issued	2000	en_US
dc.identifier.govdoc	NSC89-2218-E009-075	zh_TW
dc.identifier.uri	http://hdl.handle.net/11536/102580	-
dc.identifier.uri	https://www.grb.gov.tw/search/planDetail?id=597363&docId=112570	en_US
dc.description.sponsorship	行政院國家科學委員會	zh_TW
dc.language.iso	zh_TW	en_US
dc.title	內嵌式微處理器系統設計與實作---子計畫二：ARM 處理器指令/程式壓縮/解壓縮之設計與實作	zh_TW
dc.title	Design and Implementation of Instruction/Program Compression/Decompression for ARM Processor	en_US
dc.type	Plan	en_US
dc.contributor.department	國立交通大學資訊工程學系	zh_TW
Appears in Collections:	Research Plans