完整後設資料紀錄
DC 欄位語言
dc.contributor.authorHwang, Chih-Hongen_US
dc.contributor.authorCheng, Hui-Wenen_US
dc.contributor.authorYeh, Ta-Chingen_US
dc.contributor.authorLi, Tien-Yehen_US
dc.contributor.authorHuang, Hsuan-Mingen_US
dc.contributor.authorLi, Yimingen_US
dc.date.accessioned2014-12-08T15:02:21Z-
dc.date.available2014-12-08T15:02:21Z-
dc.date.issued2008en_US
dc.identifier.isbn978-1-4200-8505-1en_US
dc.identifier.urihttp://hdl.handle.net/11536/1030-
dc.description.abstractIntrinsic fluctuations on device characteristics, such as the threshold voltage (V(th)) fluctuation is crucial in determining the behavior of nanoscale semiconductor devices. In this paper, the dependency of process-variation and random-dopant-induced Vth fluctuation on the gate oxide thickness scaling in 16 nm metal-oxide-semiconductor field effect transistors (MOSFETs) is investigated. Fluctuations of the threshold voltage for the studied planar MOSFETs with equivalent oxide thicknesses (EOT) from 1.2 nm to 0.2 nm (e.g., SiO(2) for the 1.2 and 0.8 nm EOTs, Al(2)O(3) for the 0.4 nm EOT and HfO(2) for the 0.2 nm EOT) are then for the first time compared with the results of 16nm bulk fin-typed filed effect transistors (FinFETs), which is one of the promising candidates for next generation semiconductor devices. An experimentally validated simulation is conducted to investigate the fluctuation property. Result of this study confirms the suppression of Vth fluctuations with the gate oxide thickness scaling (using high-kappa dielectric). It's found that the immunity of the planar MOSFET against fluctuation suffers from nature of structural limitations. Bulk FinFETs alleviate the challenges of device's scaling and have potential in the nanoelectronics application.en_US
dc.language.isoen_USen_US
dc.subjectThreshold voltage fluctuationen_US
dc.subjectrandom dopanten_US
dc.subjectprocess-variationen_US
dc.subjectgate-length deviationen_US
dc.subjectline-edge roughnessen_US
dc.subjectmodeling and simulationen_US
dc.titleComprehensive Examination of Threshold Voltage Fluctuations in Nanoscale Planar MOSFET and Bulk FinFET Devicesen_US
dc.typeProceedings Paperen_US
dc.identifier.journalNSTI NANOTECH 2008, VOL 3, TECHNICAL PROCEEDINGSen_US
dc.citation.spage647en_US
dc.citation.epage650en_US
dc.contributor.department電信工程研究所zh_TW
dc.contributor.departmentInstitute of Communications Engineeringen_US
dc.identifier.wosnumberWOS:000272170200168-
顯示於類別:會議論文