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dc.contributor.author莊景德en_US
dc.contributor.author陳盈年en_US
dc.contributor.author謝建宇en_US
dc.contributor.author范銘隆en_US
dc.contributor.author胡璧合en_US
dc.contributor.author蘇彬en_US
dc.date.accessioned2014-12-16T06:11:56Z-
dc.date.available2014-12-16T06:11:56Z-
dc.date.issued2013-05-01en_US
dc.identifier.govdocG11C011/412zh_TW
dc.identifier.govdocG11C011/417zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/103285-
dc.description.abstract本發明提供一種靜態隨機存取記憶體,為七顆鰭狀電晶體架構,其使用獨立閘極超高臨界電壓的鰭狀場效電晶體,達到類似堆疊性質以消除讀取干擾以及半選取干擾,同時使用保持電路和讀取電壓控制,來降低讀取時位元線上的漏電流。再者,能有效解決先前技術使用六顆電晶體的SRAM架構,操作於較低電壓下,容易發生讀取錯誤的問題。zh_TW
dc.language.isozh_TWen_US
dc.title獨立閘極控制靜態隨機存取記憶體zh_TW
dc.typePatentsen_US
dc.citation.patentcountryTWNzh_TW
dc.citation.patentnumber201317991zh_TW
Appears in Collections:Patents


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