Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 莊立溥 | en_US |
| dc.contributor.author | 張銘宏 | en_US |
| dc.contributor.author | 黃威 | en_US |
| dc.date.accessioned | 2014-12-16T06:12:46Z | - |
| dc.date.available | 2014-12-16T06:12:46Z | - |
| dc.date.issued | 2010-04-01 | en_US |
| dc.identifier.govdoc | H03L007/08 | zh_TW |
| dc.identifier.govdoc | H03L007/16 | zh_TW |
| dc.identifier.uri | http://hdl.handle.net/11536/103769 | - |
| dc.description.abstract | 本發明揭露了一種全數位自我校正多相位延遲鎖定迴路,其包含四個主要的區塊,分別為:一組數位式控制延遲線,一相位偵測器,一鎖定單元,及一校正單元。數位式控制延遲線係由K個相同之延遲階段(delay stage)串連所形成,而所有的延遲階段皆係由兩組控制訊號C[M:0]與Bi[N:0]所控制。C[M:0]係由採用非平衡式二元搜尋演算法之鎖定單元所產生。當延遲鎖定迴路鎖定時,校正單元將產生Bi[N:0]訊號以調整各輸出訊號之間的相位差。 | zh_TW |
| dc.language.iso | zh_TW | en_US |
| dc.title | 全數位快速鎖定自我校正多相位延遲鎖定迴路 | zh_TW |
| dc.type | Patents | en_US |
| dc.citation.patentcountry | TWN | zh_TW |
| dc.citation.patentnumber | 201014187 | zh_TW |
| Appears in Collections: | Patents | |
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