Novel low-temperature polysilicon thin-film transistors with a self-aligned gate and raised source/drain formed by the damascene process

Abstract

In this letter, a novel structure of the polycrystalline silicon thin-film transistors (TFTs) with a self-aligned gate and raised source/drain (RSD) formed by the damascene process has been developed and investigated. Comparing with the conventional coplanar TFT, the proposed RSD TFT has a remarkable lower OFF-state current (177 to 6.29 nA), and the ON/OFF current ratio is only slightly decreased from 1.71 x 10(7) to 1.39 x 10(7). Only four photomasking steps are required. This novel structure is an excellent candidate for further high-performance large-area device applications.