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dc.contributor.author鄭東栓en_US
dc.contributor.author黃威en_US
dc.date.accessioned2014-12-16T06:13:30Z-
dc.date.available2014-12-16T06:13:30Z-
dc.date.issued2006-06-16en_US
dc.identifier.govdocG11C011/34zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/104182-
dc.description.abstract本發明提供一種隨機存取記憶體陣列結構,其係將一隨機存取記憶體陣列結構分成複數個資料區塊,每一資料區塊以陣列方式排列,且每一資料區塊連接有一及閘及電源閘,利用一編碼裝置使一數據資料進行儲存或讀取動作。本發明能有效使電路減少漏電流的產生,進而大幅降低動態功率之消耗。zh_TW
dc.language.isozh_TWen_US
dc.title隨機存取記憶體陣列結構zh_TW
dc.typePatentsen_US
dc.citation.patentcountryTWNzh_TW
dc.citation.patentnumber200620282zh_TW
Appears in Collections:Patents


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