完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chen Chih | en_US |
dc.contributor.author | Hsiao Hsiang-Yao | en_US |
dc.date.accessioned | 2014-12-16T06:13:48Z | - |
dc.date.available | 2014-12-16T06:13:48Z | - |
dc.date.issued | 2014-09-16 | en_US |
dc.identifier.govdoc | H01L023/48 | zh_TW |
dc.identifier.govdoc | H01L021/768 | zh_TW |
dc.identifier.govdoc | H01L023/532 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/104346 | - |
dc.description.abstract | A circuit board with twinned Cu circuit layer and a method for manufacturing the same are disclosed, wherein the method comprises the following steps: (A) providing a substrate with a first circuit layer formed thereon, wherein the first circuit layer comprises a conductive pad; (B) forming a first dielectric layer on the surface of the substrate; (C) forming plural openings in the first dielectric layer, wherein each opening penetrates through the first dielectric layer and communicates with the conductive pad to expose the conductive pad; (D) forming a Cu seeding layer in the openings; (E) forming a nano-twinned Cu layer in the openings with an electroplating process; and (F) annealing the substrate to transfer the material of the Cu seeding layer into nano-twinned Cu, wherein the nano-twinned Cu layer and the transferred Cu seeding layer are formed into a second circuit layer. | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.title | Circuit board with twinned CU circuit layer and method for manufacturing the same | zh_TW |
dc.type | Patents | en_US |
dc.citation.patentcountry | USA | zh_TW |
dc.citation.patentnumber | 08836121 | zh_TW |
顯示於類別: | 專利資料 |