標題: Memory-based FFT/IFFT processor and design method for general sized memory-based FFT processor
作者: Lee Chen-Yi
Hsiao Chen-Fong
Chen Yuan
公開日期: 29-一月-2013
摘要: For a large size FFT computation, this invention decomposes it into several smaller sizes FFT by decomposition equation and then transform the original index from one dimension into multi-dimension vector. By controlling the index vector, this invention could distribute the input data into different memory banks such that both the in-place policy for computation and the multi-bank memory for high-radix structure could be supported simultaneously without memory conflict. Besides, in order to keep memory conflict-free when the in-place policy is also adopted for I/O data, this invention reverses the decompose order of FFT to satisfy the vector reverse behavior. This invention can minimize the area and reduce the necessary clock rate effectively for general sized memory-based FFT processor design.
官方說明文件#: G06F017/14
G06F015/00
URI: http://hdl.handle.net/11536/104515
專利國: USA
專利號碼: 08364736
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