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dc.contributor.authorKeren_US
dc.contributor.authorMing-Douen_US
dc.contributor.authorHuen_US
dc.contributor.authorFang-Lingen_US
dc.date.accessioned2014-12-16T06:14:28Z-
dc.date.available2014-12-16T06:14:28Z-
dc.date.issued2009-05-12en_US
dc.identifier.govdocH03K003/00zh_TW
dc.identifier.govdocH03K019/0175zh_TW
dc.identifier.govdocH03K019/094zh_TW
dc.identifier.govdocH03B001/00zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/104746-
dc.description.abstractA mixed-voltage I/O buffer comprises an input circuit, an output circuit, an I/O pad, a pre-driver circuit coupled to the output circuit, two added coupled N-type transistors, and a dynamical gate-controlled circuit coupled to each gate of the two N-type transistors and the pre-driver circuit; one of the N-type transistors is coupled to the input circuit and the output circuit; the other N-type transistor and the dynamic gate-controlled circuit are together coupled to the I/O pad. Thereby, a mixed-voltage I/O buffer which receives 2×VDD-tolerant input signals and overcomes the hot-carrier degradation is realized.zh_TW
dc.language.isozh_TWen_US
dc.titleMixed-voltage input/output bufferzh_TW
dc.typePatentsen_US
dc.citation.patentcountryUSAzh_TW
dc.citation.patentnumber07532047zh_TW
Appears in Collections:Patents


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