Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 陳冠能 | en_US |
dc.contributor.author | 賴明芳 | en_US |
dc.contributor.author | 陳宏明 | en_US |
dc.date.accessioned | 2014-12-16T06:14:35Z | - |
dc.date.available | 2014-12-16T06:14:35Z | - |
dc.date.issued | 2013-11-21 | en_US |
dc.identifier.govdoc | H01L027/04 | zh_TW |
dc.identifier.govdoc | H02H009/00 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/104820 | - |
dc.description.abstract | 一種三維積體電路的靜電放電防護結構,包括一第一主動層、一矽晶穿孔元件以及一第二主動層。其中矽晶穿孔元件配置於第一主動層中,第二主動層則與第一主動層相互堆疊。第二主動層包括一基板以及一靜電放電保護元件,靜電放電保護元件具有一摻雜區埋於基板內,且靜電放電保護元件電性連接該矽晶穿孔元件。 | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.title | 三維積體電路的靜電放電防護結構 | zh_TW |
dc.type | Patents | en_US |
dc.citation.patentcountry | TWN | zh_TW |
dc.citation.patentnumber | I416706 | zh_TW |
Appears in Collections: | Patents |
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