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dc.contributor.authorZan Hsiao-Wenen_US
dc.contributor.authorChen Wei-Tsungen_US
dc.contributor.authorChou Cheng-Weien_US
dc.contributor.authorTsai Chuang-Chuangen_US
dc.date.accessioned2014-12-16T06:15:18Z-
dc.date.available2014-12-16T06:15:18Z-
dc.date.issued2012-01-26en_US
dc.identifier.govdocH01L029/12zh_TW
dc.identifier.govdocH01L021/04zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/105223-
dc.description.abstractA self-aligned top-gate thin film transistor and a fabrication method thereof. The method includes preparing a substrate having sequentially formed thereon an oxide semiconductor layer, a dielectric layer, and a metallic layer, wherein the oxide semiconductor layer includes first and second connecting regions that are not covered by the dielectric layer and the metallic layer thereon respectively, the first and second connecting regions having a property of a conductor after undergone a heating process or an ultraviolet irradiation; and a source electrode and a drain electrode formed on the substrate and connected to the first and second connecting regions, respectively. Therefore, the contact resistance of the first and second connecting regions can be reduced without the process of ion dopants as required by prior art techniques, thereby simplifying the manufacturing process. Also, the source electrode and the drain electrode can be exactly relocated and further increase performance of the device.zh_TW
dc.language.isozh_TWen_US
dc.titleSelf-aligned top-gate thin film transistors and method for fabricating samezh_TW
dc.typePatentsen_US
dc.citation.patentcountryUSAzh_TW
dc.citation.patentnumber20120018718zh_TW
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