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dc.contributor.authorLiu, Po-Tsunen_US
dc.contributor.authorWu, Hsing-Huaen_US
dc.date.accessioned2014-12-08T15:13:37Z-
dc.date.available2014-12-08T15:13:37Z-
dc.date.issued2007-08-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/LED.2007.900856en_US
dc.identifier.urihttp://hdl.handle.net/11536/10529-
dc.description.abstractHigh-performance low-temperature polycrystalline-silicon thin-film transistors (TFTs) have been fabricated by heat-retaining enhanced crystallization (H-REC). In the H-REC technology, a heat-retaining capping layer (HRL) is applied on the prepattern amorphous silicon islands to slow down the heat dissipation effectively. It thereby retains long duration of melting process and further enhances poly-Si-grain lateral growth. With a single shot of laser irradiation, the location-controllable poly-Si active layer with 7-mu m length of grain size can be formed successfully. In addition, in this letter, the H-REC poly-Si TFT with dual gates is studied to enhanced electrical performance and stability.en_US
dc.language.isoen_USen_US
dc.subjectexcimer laser crystallization (ELC)en_US
dc.subjectheat-retaining enhanced crystallization (H-REC)en_US
dc.subjectthin-film transistor (TFT)en_US
dc.titleHigh-performance polycrystalline-silicon TFT by heat-retaining enhanced lateral crystallizationen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/LED.2007.900856en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume28en_US
dc.citation.issue8en_US
dc.citation.spage722en_US
dc.citation.epage724en_US
dc.contributor.department光電工程學系zh_TW
dc.contributor.department顯示科技研究所zh_TW
dc.contributor.departmentDepartment of Photonicsen_US
dc.contributor.departmentInstitute of Displayen_US
dc.identifier.wosnumberWOS:000248315400018-
dc.citation.woscount1-
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