Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Luo, Guangli | en_US |
dc.contributor.author | Chien, Chao-Hsin | en_US |
dc.contributor.author | Yang, Tsung-Hsi | en_US |
dc.contributor.author | Chang, Chun-Yen | en_US |
dc.date.accessioned | 2014-12-16T06:16:04Z | - |
dc.date.available | 2014-12-16T06:16:04Z | - |
dc.date.issued | 2007-09-06 | en_US |
dc.identifier.govdoc | H01L029/76 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/105639 | - |
dc.description.abstract | The present invention discloses an architecture of a NMOS transistor with a compressive strained Si—Ge channel fabricated on a silicon (110) substrate, which comprises: a p-silicon (110) substrate, two n+ ion-implanted regions functioning as the source and the drain respectively, a compressive strained Si—Ge channel layer, and a gate structure. The compressive strained Si—Ge channel layer is grown on the p-silicon (110) substrate to reduce the electron conductivity effective mass in the [1_l -10] crystallographic direction and to promote the electron mobility in the [1-10] crystallographic direction. Thus, the present invention can improve the electron mobility of a NMOS transistor via the channels fabricated on the silicon (110) substrate. Further, the NMOS transistor of the present invention can combine with a high-speed PMOS transistor on a silicon (110) substrate to form a high-performance CMOS transistor on the same silicon (110) substrate. | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.title | Architecture of a n-type metal-oxide-semiconductor transistor with a compressive strained silicon-germanium channel fabricated on a silicon (110) substrate | zh_TW |
dc.type | Patents | en_US |
dc.citation.patentcountry | USA | zh_TW |
dc.citation.patentnumber | 20070205444 | zh_TW |
Appears in Collections: | Patents |
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