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dc.contributor.authorLuo, Guanglien_US
dc.contributor.authorChien, Chao-Hsinen_US
dc.contributor.authorYang, Tsung-Hsien_US
dc.contributor.authorChang, Chun-Yenen_US
dc.date.accessioned2014-12-16T06:16:04Z-
dc.date.available2014-12-16T06:16:04Z-
dc.date.issued2007-09-06en_US
dc.identifier.govdocH01L029/76zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/105639-
dc.description.abstractThe present invention discloses an architecture of a NMOS transistor with a compressive strained Si—Ge channel fabricated on a silicon (110) substrate, which comprises: a p-silicon (110) substrate, two n+ ion-implanted regions functioning as the source and the drain respectively, a compressive strained Si—Ge channel layer, and a gate structure. The compressive strained Si—Ge channel layer is grown on the p-silicon (110) substrate to reduce the electron conductivity effective mass in the [1_l -10] crystallographic direction and to promote the electron mobility in the [1-10] crystallographic direction. Thus, the present invention can improve the electron mobility of a NMOS transistor via the channels fabricated on the silicon (110) substrate. Further, the NMOS transistor of the present invention can combine with a high-speed PMOS transistor on a silicon (110) substrate to form a high-performance CMOS transistor on the same silicon (110) substrate.zh_TW
dc.language.isozh_TWen_US
dc.titleArchitecture of a n-type metal-oxide-semiconductor transistor with a compressive strained silicon-germanium channel fabricated on a silicon (110) substratezh_TW
dc.typePatentsen_US
dc.citation.patentcountryUSAzh_TW
dc.citation.patentnumber20070205444zh_TW
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