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dc.contributor.author柯明道en_US
dc.contributor.author林昆賢en_US
dc.date.accessioned2014-12-16T06:17:13Z-
dc.date.available2014-12-16T06:17:13Z-
dc.date.issued2006-09-11en_US
dc.identifier.govdocH01L023/60zh_TW
dc.identifier.govdocH01L023/60zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/106318-
dc.description.abstract本發明係揭露一種可避免鎖住效應之高壓積體電路電源間靜電放電箝制電路,其係應用在高壓積體電路上,將由至少二個高壓元件或是由至少一個高壓元件與至少一低壓元件所組成之堆疊元件結構運用在電源間靜電放電箝制電路上,使其在驟轉崩潰之狀態下的保持電壓超過電源供應電壓(VDD),故可藉此避免高壓積體電路電源間鎖住效應問題的發生。zh_TW
dc.language.isozh_TWen_US
dc.title可避免鎖住效應之高壓積體電路電源間靜電放電箝制電路zh_TW
dc.typePatentsen_US
dc.citation.patentcountryTWNzh_TW
dc.citation.patentnumberI261909zh_TW
Appears in Collections:Patents


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