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dc.contributor.authorKuo, Tzu-Yunen_US
dc.contributor.authorLin, Yu-Kunen_US
dc.contributor.authorChang, Tian-Sheuanen_US
dc.date.accessioned2014-12-08T15:14:38Z-
dc.date.available2014-12-08T15:14:38Z-
dc.date.issued2007en_US
dc.identifier.isbn978-1-4244-0728-6en_US
dc.identifier.issn1520-6149en_US
dc.identifier.urihttp://hdl.handle.net/11536/11099-
dc.description.abstractThis paper presents a set of fast algorithm and VLSI architecture for HDTV-sized H.264 fractional motion estimation. To solve the long computational latency in HD-sized application, we propose to use the single iteration algorithm with only six search points. This single iteration method halves the cycle count of two iteration methods in previous approaches. Moreover, we propose to use 4x4 Hadamard instead of 8x8 Hadamard as cost function for H.264 high profiles without significant video quality loss. By these techniques, the resulted architecture can save 20% of area and provide over 40% of throughput improvement than the previous work, and is able to support HDTV applications.en_US
dc.language.isoen_USen_US
dc.subjectH.264en_US
dc.subjectmotion estimationen_US
dc.subjecthigh profileen_US
dc.titleSIFME: A single iteration fractional-pel motion estimation algorithm and architecture for HDTV sized H.264 video codingen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2007 IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH, AND SIGNAL PROCESSING, VOL I, PTS 1-3, PROCEEDINGSen_US
dc.citation.spage1185en_US
dc.citation.epage1188en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000249040000297-
Appears in Collections:Conferences Paper