完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Wu, Shu-Hua | en_US |
dc.contributor.author | Yu, Chang-Hung | en_US |
dc.contributor.author | Chiang, Chun-Hsien | en_US |
dc.contributor.author | Su, Pin | en_US |
dc.date.accessioned | 2015-07-21T08:29:05Z | - |
dc.date.available | 2015-07-21T08:29:05Z | - |
dc.date.issued | 2015-01-01 | en_US |
dc.identifier.issn | 0018-9383 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/TED.2014.2375871 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/124040 | - |
dc.description.abstract | This paper provides an analytical subthreshold model for trigate MOSFETs with thin buried oxide (BOX) for multithreshold (multi-V-th) applications. This model shows a fairly good scalability in substrate bias and BOX thickness, which is crucial to the prediction of multi-Vth modulation through BOX. In addition, we demonstrate the application of our model in multi-V-th device design for trigate GeOI p-MOSFETs with the body-effect coefficient (gamma) over a wide range of design space efficiently examined. We have shown an enhanced multi-Vth modulation behavior in trigate GeOI p-MOSFETs. Our study indicates that, for a given subthreshold swing and gamma, the GeOI trigate p-MOSFET can possess a higher fin aspect ratio than the SOI counterpart. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | GeOI | en_US |
dc.subject | multi-V-th design | en_US |
dc.subject | multigate MOSFET | en_US |
dc.subject | SOI | en_US |
dc.subject | subthreshold | en_US |
dc.subject | trigate MOSFET | en_US |
dc.title | Investigation of Multi-V-th Efficiency for Trigate GeOI p-MOSFETs Using Analytical Solution of 3-D Poisson\'s Equation | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/TED.2014.2375871 | en_US |
dc.identifier.journal | IEEE TRANSACTIONS ON ELECTRON DEVICES | en_US |
dc.citation.volume | 62 | en_US |
dc.citation.spage | 88 | en_US |
dc.citation.epage | 93 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000346979800013 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 期刊論文 |