完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Shirota, Riichiro | en_US |
dc.contributor.author | Yang, Bo-Jun | en_US |
dc.contributor.author | Chiu, Yung-Yueh | en_US |
dc.contributor.author | Chen, Hsuan-Tse | en_US |
dc.contributor.author | Ng, Seng-Fei | en_US |
dc.contributor.author | Wang, Pin-Yao | en_US |
dc.contributor.author | Chang, Jung-Ho | en_US |
dc.contributor.author | Kurachi, Ikuo | en_US |
dc.date.accessioned | 2015-07-21T08:29:05Z | - |
dc.date.available | 2015-07-21T08:29:05Z | - |
dc.date.issued | 2015-01-01 | en_US |
dc.identifier.issn | 0018-9383 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/TED.2014.2366116 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/124042 | - |
dc.description.abstract | A new test system was devised and used to separate the amount of floating gate (FG) charge (Q(FG)) from the oxide trapped charge (Q(OX)) generated by program-and-erase (P/E) cycles. We also extracted the pure V-mid shift caused by the generation of Q(OX), which is separated from the part of V-t shift coming from Q(FG) deviation. The identification of Q(FG) and Vmid shift makes it possible to analyze the detailed the oxide trapped charge profile. The Q(FG) shift generated by P/E cycles displays asymmetry between the programmed and erased states: the absolute value of Q(FG) exhibits a maximum at similar to 100 cycles in the programmed states, while Q(FG) monotonically decreases in the erased one. Considering that the Fowler-Nordheim tunneling current is sensitive to the oxide trap near the cathode, itself the source of electron tunneling current, our results indicate that the hole trap is dominant near to Si, whereas the electron trap is dominant near FG. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Endurance | en_US |
dc.subject | Flash memory | en_US |
dc.subject | reliability | en_US |
dc.subject | trap | en_US |
dc.title | New Method to Analyze the Shift of Floating Gate Charge and Generated Tunnel Oxide Trapped Charge Profile in NAND Flash Memory by Program/Erase Endurance | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/TED.2014.2366116 | en_US |
dc.identifier.journal | IEEE TRANSACTIONS ON ELECTRON DEVICES | en_US |
dc.citation.volume | 62 | en_US |
dc.citation.spage | 114 | en_US |
dc.citation.epage | 120 | en_US |
dc.contributor.department | 交大名義發表 | zh_TW |
dc.contributor.department | National Chiao Tung University | en_US |
dc.identifier.wosnumber | WOS:000346979800017 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 期刊論文 |