標題: A Novel Analog Physical Synthesis Methodology Integrating Existent Design Expertise
作者: Wu, Po-Hsun
Lin, Mark Po-Hung
Chen, Tung-Chieh
Yeh, Ching-Feng
Li, Xin
Ho, Tsung-Yi
資訊工程學系
Department of Computer Science
關鍵字: Analog layout;design pattern;knowledge mining;migration;physical design;placement;routing
公開日期: 1-Feb-2015
摘要: Analog layout design has been a manual, time-consuming, and error-prone task for decades. To speed up layout design time for a new design, analog layout designers prefer referring to legacy designs and layouts rather than starting from scratch, or thoroughly applying placement and routing tools because legacy layouts contain pretty much design expertise. Motivated by such layout design process, this paper presents the first knowledge-based physical synthesis methodology to generate new layouts by integrating existent design expertise. The proposed approach can automatically analyze legacy design data including circuits, layouts, and constraints, extract matched sub-circuits between new and legacy designs, and generate multiple layouts for the new design by utilizing the quality-approved legacy layouts as much as possible. Experimental results show that the proposed methodology can achieve high layout reusage rate, and hence the designers\' layout preference can be successfully reserved.
URI: http://hdl.handle.net/11536/124196
ISSN: 0278-0070
期刊: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
Volume: 34
起始頁: 199
結束頁: 212
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