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dc.contributor.authorSu, Hong-Yanen_US
dc.contributor.authorChen, Chieh-Chuen_US
dc.contributor.authorLi, Yih-Langen_US
dc.contributor.authorTu, An-Chunen_US
dc.contributor.authorWu, Chuh-Jenen_US
dc.contributor.authorHuang, Chen-Mingen_US
dc.date.accessioned2015-07-21T08:28:45Z-
dc.date.available2015-07-21T08:28:45Z-
dc.date.issued2015-01-01en_US
dc.identifier.issn0278-0070en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TCAD.2014.2364973en_US
dc.identifier.urihttp://hdl.handle.net/11536/124231-
dc.description.abstractAs design-for-manufacturability techniques have become widely used to improve the yield of nano-scale semiconductor technology in recent years, hotspot detection methods have been investigated with a view to calibrating layout patterns that tend to reduce yield. In this paper, we propose two graph models, i.e., skeleton graph and space graph, to formulate polygon topology and spatial relationship among polygons. In addition, a Prufer encoding-based method is presented to encode each skeleton graph. Single polygon matching problem is then equivalent to the verification of graph isomorphism, which is realized by checking the identity of two enhanced Prfer codes associated with two skeleton grap. A branch and bound-based pattern anchoring algorithm is presented to resolve the vertex ordering problem for isomorphism checking. The general exact pattern matching problem can then be accomplished by adopting the space graph to identify the similarity of spatial relationship among polygons. Vias are one of the most device components that attract much attention in monitoring manufacturing variation due to via alignment issue, but hotspot detection rarely takes vias into consideration. Multilayer hotspot detection can also be realized by extending the skeleton graph to maintain the relations between adjacent layers through vias. Experimental results show that we can achieve 5.6x runtime speedup than design-rule-based methodology in average for single layer hotspot detection while the runtime for multilayer hotspot is roughly equal to the summation of that for individual single layer hotspot detection.en_US
dc.language.isoen_USen_US
dc.subjectDesign for manufacturabilityen_US
dc.subjectlayout topologyen_US
dc.subjectlithographyen_US
dc.subjectpattern matchingen_US
dc.subjectprocess hotspoten_US
dc.subjectPrufer encodingen_US
dc.titleA Novel Fast Layout Encoding Method for Exact Multilayer Pattern Matching With Prufer Encodingen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TCAD.2014.2364973en_US
dc.identifier.journalIEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMSen_US
dc.citation.volume34en_US
dc.citation.spage95en_US
dc.citation.epage108en_US
dc.contributor.department資訊工程學系zh_TW
dc.contributor.departmentDepartment of Computer Scienceen_US
dc.identifier.wosnumberWOS:000348228400010en_US
dc.citation.woscount0en_US
Appears in Collections:Articles