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dc.contributor.authorSu, Ming-Chiuanen_US
dc.contributor.authorJou, Shyh-Jyeen_US
dc.contributor.authorChen, Wei-Zenen_US
dc.date.accessioned2015-07-21T08:29:26Z-
dc.date.available2015-07-21T08:29:26Z-
dc.date.issued2015-04-01en_US
dc.identifier.issn1063-8210en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TVLSI.2014.2314740en_US
dc.identifier.urihttp://hdl.handle.net/11536/124477-
dc.description.abstractA low-jitter digitally controlled oscillator (DCO) with multiphase differential outputs and good linearity is presented. The DCO is composed of four differential delay cells and can achieve linear tuning over a wide frequency range. The proposed fully differential delay cell comprises logic cells in standard library and varactors. The measured rms jitter and pk-pk jitter from 2.5-GHz carrier are 2.827 and 29 ps, respectively. The power consumption is 6 mW from a 1.2 V supply. An experimental prototype is designed using 65-nm CMOS technology, and the chip area is 156 mu m x 92 mu m(2).en_US
dc.language.isoen_USen_US
dc.subjectAll-digitalen_US
dc.subjectdifferentialen_US
dc.subjectdigitally controlled oscillator (DCO)en_US
dc.subjectlow jitteren_US
dc.subjectmultiphaseen_US
dc.titleA Low-Jitter Cell-Based Digitally Controlled Oscillator With Differential Multiphase Outputsen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TVLSI.2014.2314740en_US
dc.identifier.journalIEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMSen_US
dc.citation.volume23en_US
dc.citation.spage766en_US
dc.citation.epage770en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000351751400015en_US
dc.citation.woscount0en_US
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