完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Tsai, Szu-Ping | en_US |
dc.contributor.author | Hsu, Heng-Tung | en_US |
dc.contributor.author | Tu, Yung-Yi | en_US |
dc.contributor.author | Chang, Edward Yi | en_US |
dc.date.accessioned | 2015-07-21T08:29:41Z | - |
dc.date.available | 2015-07-21T08:29:41Z | - |
dc.date.issued | 2015-03-01 | en_US |
dc.identifier.issn | 1882-0778 | en_US |
dc.identifier.uri | http://dx.doi.org/10.7567/APEX.8.034101 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/124527 | - |
dc.description.abstract | This paper demonstrates, for the first time, the potential of using flip-chip packaging to connect multiple AlGaN/GaN high-electron-mobility transistors (HEMTs) in parallel for application in power electronics. The electrical and thermal properties of both the bare and the packaged devices were experimentally investigated via pulsed current-voltage (I-V) measurements. Compared to the bare die, less than one-fifth the thermal resistance (R-th), triple the output current, and one-third the on-resistance (R-on) with temperature insensibility were observed when three transistors were connected in parallel through flip-chip packaging. Superior performance such as this makes flip-chip packaging a potential technology for high power GaN electronic applications. (C) 2015 The Japan Society of Applied Physics | en_US |
dc.language.iso | en_US | en_US |
dc.title | Investigation of electrical and thermal properties of multiple AlGaN/GaN high-electron-mobility transistors flip-chip packaged in parallel for power electronics | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.7567/APEX.8.034101 | en_US |
dc.identifier.journal | APPLIED PHYSICS EXPRESS | en_US |
dc.contributor.department | 材料科學與工程學系 | zh_TW |
dc.contributor.department | Department of Materials Science and Engineering | en_US |
dc.identifier.wosnumber | WOS:000352220700018 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 期刊論文 |