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dc.contributor.authorWang, Yao-Chinen_US
dc.contributor.authorLin, Bor-Shyhen_US
dc.contributor.authorChan, Ming-Cheen_US
dc.date.accessioned2015-07-21T08:29:46Z-
dc.date.available2015-07-21T08:29:46Z-
dc.date.issued2015-06-01en_US
dc.identifier.issn0263-2241en_US
dc.identifier.urihttp://dx.doi.org/10.1016/j.measurement.2015.03.018en_US
dc.identifier.urihttp://hdl.handle.net/11536/124629-
dc.description.abstractThe study proposed electro-optical measurement and process inspection for integrated-gate-driver circuit on thin-film-transistor array panel. It is a trend on the developing with application of integrated gate driver circuit in the narrow frame design and reduction of driver integrated circuit chips in thin-film-transistor array backplane. Over the past, it cannot detect that contain integrated-gate-driver circuit on thin-film-transistor array panel, especially in process defects of the integrated-gate-driver circuit. The paper proposed a process inspection for the defects in integrated-gate-driver circuit on the thin-film-transistor array panel by the voltage imaging technique and reported good performance. (C) 2015 Elsevier Ltd. All rights reserved.en_US
dc.language.isoen_USen_US
dc.subjectElectro-optical measurementen_US
dc.subjectIntegrated gate driveren_US
dc.subjectTFT array panelen_US
dc.titleElectro-optical measurement and process inspection for integrated gate driver circuit on thin-film-transistor array panelsen_US
dc.typeArticleen_US
dc.identifier.doi10.1016/j.measurement.2015.03.018en_US
dc.identifier.journalMEASUREMENTen_US
dc.citation.volume70en_US
dc.citation.spage83en_US
dc.citation.epage87en_US
dc.contributor.department光電系統研究所zh_TW
dc.contributor.department影像與生醫光電研究所zh_TW
dc.contributor.departmentInstitute of Photonic Systemen_US
dc.contributor.departmentInstitute of Imaging and Biomedical Photonicsen_US
dc.identifier.wosnumberWOS:000354402000009en_US
dc.citation.woscount0en_US
顯示於類別：期刊論文


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