標題: | A Reliable Brain Computer Interface Implemented on an FPGA for a Mobile Dialing System |
作者: | Feng, Chih-Wei Hu, Ting-Kuei Chang, Jui-Chung Fang, Wai-Chi 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 1-Jan-2014 |
摘要: | This paper demonstrates a high performance brain-computer interface (BCI) that allows users to dial phone numbers. The system is based on Canonical Correlation Analysis (CCA) and Steady-State Visual Evoked Potential (SSVEP). Through six frequency bands (9Hz, 10Hz, 11Hz, 12Hz, 13 Hz, 14Hz) displayed on the screen, subjects can choose a phone number by gazing at the display interface. This proposed EEG system has been implemented in Field-Programmable Gate Arrays (FPGA), and shows high accuracy, high integration density, and low cost. These features are meaningful for implementing a real-time SSVEP-based BCI. |
URI: | http://hdl.handle.net/11536/124895 |
ISBN: | 978-1-4799-3432-4 |
ISSN: | 0271-4302 |
期刊: | 2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) |
起始頁: | 654 |
結束頁: | 657 |
Appears in Collections: | Conferences Paper |