完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Wang, Wen-Chieh | en_US |
dc.contributor.author | Wu, Chung-Yu | en_US |
dc.date.accessioned | 2014-12-08T15:17:05Z | - |
dc.date.available | 2014-12-08T15:17:05Z | - |
dc.date.issued | 2007 | en_US |
dc.identifier.isbn | 978-1-4244-1000-2 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/12490 | - |
dc.description.abstract | A new high frequency CMOS current-mode upconversion mixer is proposed to realize the transmitter frontend in the frequency band of 24 GHz. The transmitter integrates with a double-balance current-mode up-conversion mixer, an IF amplifier/repeater, a differential VCO and a differential VCO buffer/repeater. The performance of the transmitter exhibits a conversion gain of 1.3 dB, the input 1-dB compression point (P-1dB) is - 22 dBm, the input intercept 3(rd)-order compression point (P-IIP3) is - 8.75 dBm, and the output intercept 3(rd)-order compression point (P-OIP3) is - 7.44 dBm. The phase noise of the differential VCO is - 117 dBc/Hz at 10-MHz offset from 26 GHz. The proposed mixer consumes only 3.89 mW from a 1-V supply. The total power dissipation of the transmitter is 15.4 mW from 1-V supply. This chip is designed in 0.13-mu m 1P8M CMOS technology and under fabrication. | en_US |
dc.language.iso | en_US | en_US |
dc.title | The 1-V 24-GHz low-voltage low-power current-mode transmitter in 130-nm CMOS technology | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2007 PH.D RESEARCH IN MICROELECTRONICS AND ELECTRONICS | en_US |
dc.citation.spage | 49 | en_US |
dc.citation.epage | 52 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000255548900013 | - |
顯示於類別: | 會議論文 |