Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Shirota, R. | en_US |
dc.contributor.author | Yang, B-J. | en_US |
dc.contributor.author | Chiu, Y-Y | en_US |
dc.contributor.author | Chen, H-T. | en_US |
dc.contributor.author | Ng, S-F. | en_US |
dc.contributor.author | Wang, P-Y. | en_US |
dc.contributor.author | Chang, J-H. | en_US |
dc.contributor.author | Kurachi, I. | en_US |
dc.date.accessioned | 2015-07-21T08:31:13Z | - |
dc.date.available | 2015-07-21T08:31:13Z | - |
dc.date.issued | 2014-01-01 | en_US |
dc.identifier.isbn | 978-1-4799-3596-3 | en_US |
dc.identifier.issn | 2330-7978 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/124928 | - |
dc.description.abstract | New method to extract the amount of floating (FG) charge (Q(FG)) apart from oxide trapped charge (Q(OX)) generated by program and erase (P/E) cycles is proposed, for the first time. Q(FG) shift by P/E cycling shows asymmetry between programmed and erased states as follows; vertical bar Q(FG)vertical bar exhibits the peak at similar to 100 cycles in programmed state, while vertical bar Q(FG)vertical bar monotonically reduces in erased state. Next, the midgap voltage (V-mid) shift of the cell caused by the generation of Q(OX) is also extracted by this method. Therefore, it enables to analyze the profiles of the hole and electron-trap separately across the oxide in detail. It is demonstrated that the hole-trap is mainly distributed near to Si surface and the centroid of electron-trap is located near to the middle of oxide. In addition, it is found that hole-trap near to Si has strong dependence on erase bias. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Flash memory | en_US |
dc.subject | reliability | en_US |
dc.subject | endurance | en_US |
dc.subject | trap | en_US |
dc.title | New Accurate Method to Analyze both Floating Gate Charge and Tunnel Oxide Trapped Charge Profile in NAND Flash Memory | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2014 IEEE 6TH INTERNATIONAL MEMORY WORKSHOP (IMW) | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000346141000015 | en_US |
dc.citation.woscount | 0 | en_US |
Appears in Collections: | Conferences Paper |