標題: | New Accurate Method to Analyze both Floating Gate Charge and Tunnel Oxide Trapped Charge Profile in NAND Flash Memory |
作者: | Shirota, R. Yang, B-J. Chiu, Y-Y Chen, H-T. Ng, S-F. Wang, P-Y. Chang, J-H. Kurachi, I. 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | Flash memory;reliability;endurance;trap |
公開日期: | 1-一月-2014 |
摘要: | New method to extract the amount of floating (FG) charge (Q(FG)) apart from oxide trapped charge (Q(OX)) generated by program and erase (P/E) cycles is proposed, for the first time. Q(FG) shift by P/E cycling shows asymmetry between programmed and erased states as follows; vertical bar Q(FG)vertical bar exhibits the peak at similar to 100 cycles in programmed state, while vertical bar Q(FG)vertical bar monotonically reduces in erased state. Next, the midgap voltage (V-mid) shift of the cell caused by the generation of Q(OX) is also extracted by this method. Therefore, it enables to analyze the profiles of the hole and electron-trap separately across the oxide in detail. It is demonstrated that the hole-trap is mainly distributed near to Si surface and the centroid of electron-trap is located near to the middle of oxide. In addition, it is found that hole-trap near to Si has strong dependence on erase bias. |
URI: | http://hdl.handle.net/11536/124928 |
ISBN: | 978-1-4799-3596-3 |
ISSN: | 2330-7978 |
期刊: | 2014 IEEE 6TH INTERNATIONAL MEMORY WORKSHOP (IMW) |
顯示於類別: | 會議論文 |