標題: Device Simulation of P-InAlN-Gate AlGaN/GaN High Electron Mobility Transistor
作者: Shrestha, Niraj Man
Lin, Yueh-Chin
Chang, Han-Tung
Li, Yiming
Chang, Edward Yi
材料科學與工程學系
Department of Materials Science and Engineering
關鍵字: Enhancement mode;p-AlInN;Threshold voltage;2 dimensional electron gas;High electron mobility transistor;Device simulation
公開日期: 1-Jan-2014
摘要: Enhancement mode AlGaN/GaN high electron mobility transistor with p-InAlN gate is designed and successfully studied its electrical properties. Threshold voltage of the device is 1.9 V, which is required magnitude of threshold voltage for real device. Similarly, the maximum drain current is 520 mA/mm and trasconductance is 183 mS/mm, which is the record estimation for enhancement-mode (e-mode) device with recorded threshold voltage. P-InAlN layer injects hole to the barrier at higher gate voltage and results in comparatively larger drain current. Selective area etching and re-grow AlInN causes thin barrier layer beneath the gate. This recess like p-InAlN structure can reduce the concentration of 2DEG; and thus results the high magnitude of threshold voltage.
URI: http://hdl.handle.net/11536/124931
ISBN: 978-1-4799-5433-9
ISSN: 
期刊: 2014 INTERNATIONAL WORKSHOP ON COMPUTATIONAL ELECTRONICS (IWCE)
Appears in Collections:Conferences Paper