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dc.contributor.authorChen, Zong-Yien_US
dc.contributor.authorHung, Chung-Chihen_US
dc.date.accessioned2015-07-21T08:30:56Z-
dc.date.available2015-07-21T08:30:56Z-
dc.date.issued2014-01-01en_US
dc.identifier.isbn978-1-4799-4132-2en_US
dc.identifier.issn1548-3746en_US
dc.identifier.urihttp://hdl.handle.net/11536/124997-
dc.description.abstractIn this paper, the DLL-based pulse-width modulation (PWM) digital-to-analog converter (DAC) is proposed to convert the output of multi-bit quantizer to a single-bit pulse-width modulated signal in the modified continuous-time sigma-delta modulators (CT-SDMs) with improved signal transfer function (STF). The DLL-based PWM DAC is more robust to clock jitter and excess loop delay (ELD) effects than conventional multi-bit DAC and other PWM DAC with similar speed and power requirements of the integrators in CT-SDMs. Furthermore, the proposed PWM DAC is based on inherently linear single-bit DAC, so the dynamic-element matching (DEM) techniques, which increase the circuit complexity and power consumption to compensate the mismatch of unit elements in the multi-bit DAC, can be removed in CT-SDMs.en_US
dc.language.isoen_USen_US
dc.titleDLL-Based Pulse-Width Modulation Digital-to-Analog Converter for Continuous-Time Sigma Delta Modulatorsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2014 IEEE 57TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS)en_US
dc.citation.spage757en_US
dc.citation.epage760en_US
dc.contributor.department電機工程學系zh_TW
dc.contributor.departmentDepartment of Electrical and Computer Engineeringen_US
dc.identifier.wosnumberWOS:000350205800189en_US
dc.citation.woscount0en_US
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