完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chen, Zong-Yi | en_US |
dc.contributor.author | Hung, Chung-Chih | en_US |
dc.date.accessioned | 2015-07-21T08:30:56Z | - |
dc.date.available | 2015-07-21T08:30:56Z | - |
dc.date.issued | 2014-01-01 | en_US |
dc.identifier.isbn | 978-1-4799-4132-2 | en_US |
dc.identifier.issn | 1548-3746 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/124997 | - |
dc.description.abstract | In this paper, the DLL-based pulse-width modulation (PWM) digital-to-analog converter (DAC) is proposed to convert the output of multi-bit quantizer to a single-bit pulse-width modulated signal in the modified continuous-time sigma-delta modulators (CT-SDMs) with improved signal transfer function (STF). The DLL-based PWM DAC is more robust to clock jitter and excess loop delay (ELD) effects than conventional multi-bit DAC and other PWM DAC with similar speed and power requirements of the integrators in CT-SDMs. Furthermore, the proposed PWM DAC is based on inherently linear single-bit DAC, so the dynamic-element matching (DEM) techniques, which increase the circuit complexity and power consumption to compensate the mismatch of unit elements in the multi-bit DAC, can be removed in CT-SDMs. | en_US |
dc.language.iso | en_US | en_US |
dc.title | DLL-Based Pulse-Width Modulation Digital-to-Analog Converter for Continuous-Time Sigma Delta Modulators | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2014 IEEE 57TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS) | en_US |
dc.citation.spage | 757 | en_US |
dc.citation.epage | 760 | en_US |
dc.contributor.department | 電機工程學系 | zh_TW |
dc.contributor.department | Department of Electrical and Computer Engineering | en_US |
dc.identifier.wosnumber | WOS:000350205800189 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 會議論文 |