完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 王盈傑 | en_US |
dc.contributor.author | Wang,Ying-Chieh | en_US |
dc.contributor.author | 唐麗英 | en_US |
dc.contributor.author | Tong, Lee-Ing | en_US |
dc.date.accessioned | 2015-11-26T00:55:25Z | - |
dc.date.available | 2015-11-26T00:55:25Z | - |
dc.date.issued | 2014 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#GT070163305 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/125767 | - |
dc.description.abstract | 在中國人工低廉、削價競爭的趨勢下,為了使台灣更具有競爭力, 台灣半導體業面臨的難題是如何提升產品良率來提高獲利。由於市場對於3C產品的要求轉向高速運算、省電及精細化,數位電路的設計不僅更加複雜,也受到摩爾定律所帶來的限制。在晶圓製造的製程中,化學機械平坦化製程能有效地控制晶圓平坦度,而提高晶圓的平坦度便能提高晶圓的良率。本研究針對化學機械平坦化製程,利用實驗設計法來規劃實驗,目的在找出影響晶圓中心與晶邊厚度差的重要因子,藉由變異數分析來找出這些重要因子的最佳參數組合,以U公司的化學機械研磨製程為例,發現此最佳組合在改善晶圓平坦度有很大的幫助。此研究除了能有效改善晶圓平坦度外,也證實了實驗設計法是改善晶圓品質的一個重要的方法。 | zh_TW |
dc.description.abstract | Due to the competitively low-priced labor in China, its overcapacity in semiconductor production leads to falling price in the global semiconductor market. Thus, Taiwanese semiconductor manufacturing companies are facing the problem of low profit. They need to enhance the profit by reducing wafer defects in order to make Taiwan more competitive in the semiconductor industry. As a result of the market demand of high-speed computing, energy saving and size thinning in 3C products, optimization of digital circuit design not only becomes complicated but also is restricted by Moore’s Law. Among hundreds of processing steps used in the fabrication of wafer, Chemical Mechanical Planarization (CMP) is one of the effective steps in controlling the wafer uniformity. Increasing the wafer uniformity can increase the wafer yield. The objective of this study is to identify important factors which have an influence on the uniformity of a wafer center and edge in CMP process. Design of Experiments (DOE) is utilized to find out the optimal parameter setting for improving the wafer uniformity. A case study of U company is utilized to demonstrate the effectiveness of the proposed method in CMP process. In addition, through this study, DOE is found to be an effective statistical method for enhancing the wafer yield. | en_US |
dc.language.iso | zh_TW | en_US |
dc.subject | 化學機械平坦化製程 | zh_TW |
dc.subject | 摩爾定律 | zh_TW |
dc.subject | 實驗設計 | zh_TW |
dc.subject | 變異數分析 | zh_TW |
dc.subject | 晶圓平坦度 | zh_TW |
dc.subject | Chemical Mechanical Planarization Process | en_US |
dc.subject | Moore's Law | en_US |
dc.subject | Design of Experiments | en_US |
dc.subject | variance analysis | en_US |
dc.subject | wafer uniformity | en_US |
dc.title | 利用實驗設計法改善半導體CMP製程晶圓平坦度 - 以U公司為例 | zh_TW |
dc.title | Improvement on the wafer uniformity of CMP process using Designed Experiments - A Case Study of U Company | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 管理學院工業工程與管理學程 | zh_TW |
顯示於類別: | 畢業論文 |