適用於高速嵌入式記憶體之高速及低功率消耗數位式降壓電路

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	陳瑞隆	en_US
dc.contributor.author	Chen, Jui-Lung	en_US
dc.contributor.author	陳科宏	en_US
dc.contributor.author	劉志尉	en_US
dc.contributor.author	Chen, Ke-Horng	en_US
dc.contributor.author	Liu, Chih-Wei	en_US
dc.date.accessioned	2015-11-26T00:56:21Z	-
dc.date.available	2015-11-26T00:56:21Z	-
dc.date.issued	2015	en_US
dc.identifier.uri	http://140.113.39.130/cdrfb3/record/nctu/#GT079967510	en_US
dc.identifier.uri	http://hdl.handle.net/11536/126393	-
dc.language.iso	en_US	en_US
dc.subject	數位式降壓電路	zh_TW
dc.subject	嵌入式記憶體	zh_TW
dc.subject	低功率	zh_TW
dc.subject	Digital LDO	en_US
dc.subject	embedded memory	en_US
dc.subject	low power	en_US
dc.title	適用於高速嵌入式記憶體之高速及低功率消耗數位式降壓電路	zh_TW
dc.title	An Ultra-fast Response and Low Power Consumption Digital Low Dropout Regulator for High Speed embedded Memory Applications	en_US
dc.type	Thesis	en_US
dc.contributor.department	電機學院電機與控制學程	zh_TW
顯示於類別：	畢業論文