標準元件數位流程相容之能量回收電路設計與實作

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	李承晏	en_US
dc.contributor.author	Lee, Cheng-Yen	en_US
dc.contributor.author	楊家驤	en_US
dc.contributor.author	謝秉璇	en_US
dc.contributor.author	Yang, Chia-Hsiang	en_US
dc.contributor.author	Hsieh, Ping-Hsuan	en_US
dc.date.accessioned	2015-11-26T00:56:22Z	-
dc.date.available	2015-11-26T00:56:22Z	-
dc.date.issued	2015	en_US
dc.identifier.uri	http://140.113.39.130/cdrfb3/record/nctu/#GT070150242	en_US
dc.identifier.uri	http://hdl.handle.net/11536/126403	-
dc.language.iso	en_US	en_US
dc.subject	能量回收	zh_TW
dc.subject	最小功率消耗	zh_TW
dc.subject	數位訊號處理器架構	zh_TW
dc.subject	絕熱邏輯	zh_TW
dc.subject	互補金屬氧化物半導體積體電路	zh_TW
dc.subject	Energy recycling	en_US
dc.subject	Power minimization	en_US
dc.subject	DSP architecture	en_US
dc.subject	Adiabatic logic	en_US
dc.subject	CMOS integrated circuits	en_US
dc.title	標準元件數位流程相容之能量回收電路設計與實作	zh_TW
dc.title	Design and Implementation of a Standard-Cell Design Flow Compatible Energy Recycling Logic	en_US
dc.type	Thesis	en_US
dc.contributor.department	電子工程學系電子研究所	zh_TW
顯示於類別：	畢業論文