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dc.contributor.author趙堉斌en_US
dc.contributor.authorZhao, Yu-Binen_US
dc.contributor.author莊紹勳en_US
dc.contributor.authorChung, Shao-Shiunen_US
dc.date.accessioned2015-11-26T00:57:07Z-
dc.date.available2015-11-26T00:57:07Z-
dc.date.issued2015en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT070250105en_US
dc.identifier.urihttp://hdl.handle.net/11536/126921-
dc.language.isoen_USen_US
dc.subject穿隧電晶體zh_TW
dc.subject面穿隧zh_TW
dc.subject閘極-源極 電容zh_TW
dc.subject反向器zh_TW
dc.subject靜態隨機儲存記憶體zh_TW
dc.subject低功耗zh_TW
dc.subjectTFETen_US
dc.subjectFace Tunnelingen_US
dc.subjectGate to Drain Capacitanceen_US
dc.subjectinverteren_US
dc.subjectSRAMen_US
dc.subjectLow Poweren_US
dc.title互補式面穿隧場效電晶體之結構設計與低功耗電路應用探討zh_TW
dc.titleDesign of the Complementary Face-Tunneling FET for Ultra-low Power Applicationsen_US
dc.typeThesisen_US
dc.contributor.department電子工程學系 電子研究所zh_TW
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