完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 趙堉斌 | en_US |
dc.contributor.author | Zhao, Yu-Bin | en_US |
dc.contributor.author | 莊紹勳 | en_US |
dc.contributor.author | Chung, Shao-Shiun | en_US |
dc.date.accessioned | 2015-11-26T00:57:07Z | - |
dc.date.available | 2015-11-26T00:57:07Z | - |
dc.date.issued | 2015 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#GT070250105 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/126921 | - |
dc.language.iso | en_US | en_US |
dc.subject | 穿隧電晶體 | zh_TW |
dc.subject | 面穿隧 | zh_TW |
dc.subject | 閘極-源極 電容 | zh_TW |
dc.subject | 反向器 | zh_TW |
dc.subject | 靜態隨機儲存記憶體 | zh_TW |
dc.subject | 低功耗 | zh_TW |
dc.subject | TFET | en_US |
dc.subject | Face Tunneling | en_US |
dc.subject | Gate to Drain Capacitance | en_US |
dc.subject | inverter | en_US |
dc.subject | SRAM | en_US |
dc.subject | Low Power | en_US |
dc.title | 互補式面穿隧場效電晶體之結構設計與低功耗電路應用探討 | zh_TW |
dc.title | Design of the Complementary Face-Tunneling FET for Ultra-low Power Applications | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 電子工程學系 電子研究所 | zh_TW |
顯示於類別: | 畢業論文 |