60 GHz多載波濾波器組系統之相位雜訊消除與取樣頻率偏移追蹤等化器

Abstract

在本論文中提出了針對 60 GHz 頻帶應用的三模組基頻接收器電路。 我們在 基於 IEEE 802.15.3c 和 IEEE 802.11ad 規格的單一載波和正交分頻多工雙模式接 收器電路中， 再加上多載波濾波器組模式。 為了滿足可適用於 2.64 GHz 的取樣 頻率， 本文所提之數位基頻接收器模組設計採用八倍平行且無反饋的電路設計。 在多載波濾波器組模式的設計中， 為了善用此模式的特點， 我們基於 IEEE 802.15.3c 規格， 修改了原本的頻譜規格， 藉此我們可以利用更多的子載波來傳送 資料。 在此模式下， 除了原本因射頻端的不理想造成的相位雜訊外， 我們還需要 考慮到剩餘的取樣頻偏移對邊緣頻帶子載波的影響。 因此， 我們提出相位雜訊消 除與取樣頻率偏移等化器來消除這些影響。 所提出的演算法在多載波濾波器組 模式中， 能夠在訊號雜訊比為 24 dB 的非可視通道情況下讓位元錯誤率降至10。 與正交分頻多工模式比較， 多載波濾波器組模式的效能約低了 4 dB。 而多載波濾 波器組模式的傳送效能比正交分頻多工模式多出了 52.6%。 所提出的三模組基頻接收器電路包含一個全數位同步模組、 多相濾波器模組、 通道等化器、 高吞吐量快速傅立葉轉換模組與相位雜訊消除器與取樣頻率偏移等 化器模組。 在 500 MHz 的操作頻率下， 多載波濾波器組模式可以達到 21.4 Gbps 的資料傳輸率， 高於單一載波模式的 7 Gbps 和正交分頻多工模式的 14 Gbps。 而 所提出的相位雜訊消除與取樣頻率偏移等化器的面積為 645K gate count， 在基頻 接收器中所佔的比例僅 15% (不包含記憶體)， 其中相位雜訊消除器佔 9%及取樣 頻率偏移等化器佔了 6%。

In this thesis, the triple-mode baseband receiver system for 60 GHz application is proposed. Base on IEEE 802.15.3c and IEEE 802.11ad specification, we merge filterbank multicarrier (FBMC) system into original dual-mode (SC and HSI) baseband receiver. In order to relax the clock rate, the modules of the design are implemented with 8x-parallelism without feedback tracking loop to meet the 2.64 GHz sampling rate. In the design of FBMC system, we re-define a spectral mask based on IEEE 802.15.3c so that we can utilize the advantages of FBMC system to put as many data subcarriers as we desire. Besides the phase noise caused by the RF non-ideality, we also need to deal with the residual sampling clock offset (SCO) on the band edge subcarriers, which are more severe in extra subcarriers we used in FBMC. Therefore, we propose phase noise cancellation (PNC) with SCO tracking equalizer to deal with both issues. The proposed algorithm can actually improve the performance to 10 BER at 24 dB SNR under NLOS channel in FBMC mode. Compared to OFDM mode, there is 4 dB performance loss due to un-resolvable ISI and ICI. However, the total transmission efficiency in FBMC mode is 152.6% higher than OFDM mode. The proposed baseband receiver is composed by all-digital synchronization, polyphase filter-bank, channel equalizer, high throughput FFT and PNC with SCO tracking equalizer. When working at 500 MHz, the proposed FBMC hardware achieve 21.4 Gbps, which is higher than SC of 7 Gbps and OFDM of 14 Gbps due to the higher bandwidth efficiency and time domain efficiency. The area of the proposed PNC with SCO tracking equalizer is 645K gate count, which is only 15% in baseband receiver excluding memory and 9% for PNC and 6% for SCO tracking design.