Full metadata record
DC FieldValueLanguage
dc.contributor.authorLiao, Ta-Chuanen_US
dc.contributor.authorWu, Chun-Yuen_US
dc.contributor.authorChien, Feng-Tsoen_US
dc.contributor.authorTsai, Chun-Chienen_US
dc.contributor.authorChen, Hsiu-Hsinen_US
dc.contributor.authorKung, Chung-Yuanen_US
dc.contributor.authorCheng, Huang-Chungen_US
dc.date.accessioned2014-12-08T15:17:35Z-
dc.date.available2014-12-08T15:17:35Z-
dc.date.issued2006en_US
dc.identifier.issn1099-0062en_US
dc.identifier.urihttp://hdl.handle.net/11536/12760-
dc.identifier.urihttp://dx.doi.org/10.1149/1.2357985en_US
dc.description.abstractA T-shaped-gated (T-gate) poly-Si thin-film transistor (TFT) with symmetric vacuum gaps has been proposed and fabricated simply with a selective-etching technique and an in situ vacuum encapsulation. The proposed TFT has demonstrated a higher maximum on-off current ratio and superior reliability compared to the conventional TFTs. This is attributed to the resulting offset region and vacuum gap to reduce the off-state leakage current and improve the hot-carrier reliability, while the extra subgate serves to induce an inversion layer at the offset region to maintain the on current during the on state. Therefore, such a T-gate poly-Si TFT is very suitable for manufacturing and applications in active-matrix flat panel electronics. (c) 2006 The Electrochemical Society.en_US
dc.language.isoen_USen_US
dc.titleA poly-Si thin-film transistor with the in situ vacuum gaps under the T-shaped-gated electrodeen_US
dc.typeArticleen_US
dc.identifier.doi10.1149/1.2357985en_US
dc.identifier.journalELECTROCHEMICAL AND SOLID STATE LETTERSen_US
dc.citation.volume9en_US
dc.citation.issue12en_US
dc.citation.spageG347en_US
dc.citation.epageG350en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000241586200022-
dc.citation.woscount7-
Appears in Collections:Articles