標題: Impact of Residual Hardmask Wires on the Performance of Film-Profile-Engineered ZnO Thin-Film Transistors With Discrete Bottom Gates
作者: Lyu, Rong-Jhe
Lin, Horng-Chih
Huang, Tiao-Yuan
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Metal oxides;film profile engineering (FPE);ZnO;thin-film transistor
公開日期: 1-八月-2015
摘要: Root cause for the anomalous degradation in the ON-current of film-profile-engineered ZnO thin-film transistors with discrete bottom gates, a new scheme proposed in our previous work, is investigated. Our findings indicate that the deposited source/drain (S/D) metal contact pads are disconnected owing to two TiN wires hung over the S/D regions, which are unintentionally formed during the fabrication of devices. The disconnected S/D metal contacts cause an increase in the S/D series resistance, and thus, the ON-current is degraded. Several ways for addressing this issue are proposed in this letter, including the simple thinning of gate electrode. As the undesirable TiN wires are eliminated, the devices demonstrate enhanced field-effect mobility and uniformity in performance.
URI: http://dx.doi.org/10.1109/LED.2015.2445772
http://hdl.handle.net/11536/128003
ISSN: 0741-3106
DOI: 10.1109/LED.2015.2445772
期刊: IEEE ELECTRON DEVICE LETTERS
Volume: 36
起始頁: 796
結束頁: 798
顯示於類別:期刊論文