標題: A Fully-Integrated Wireless Bondwire Accelerometer With Closed-loop Readout Architecture
作者: Liao, Yu-Te
Huang, Shih-Chieh
Cheng, Fu-Yuan
Tsai, Tsung-Heng
電機資訊學士班
Undergraduate Honors Program of Electrical Engineering and Computer Science
關鍵字: Bondwire;CMOS;inertial sensing;resonant accelerometer;wireless accelerometer
公開日期: 1-十月-2015
摘要: This paper presents a fully-integrated wireless bondwire accelerometer using a closed-loop readout interface that effectively reduces the noise from electrical circuits and long-term frequency drifts. The proposed accelerometer was fabricated using 0.18-mu m CMOS technology without micro electromechanical systems (MEMS) processing. To reduce manufacturing errors, the bondwire inertial sensors are wire-bonded on the chip pads, thereby enabling a precisely-defined length and space between sensing bondwires. The proposed wireless accelerometer using a pair of 15.2 mu m and 25.4 mu m bondwires achieves a linear transducer gain of 33 mV/g, bandwidth of 5 kHz, a noise floor of 700 mu g/root Hz, and 4.5 mu g bias stability. The acceleration data is digitalized by an energy-efficient 10-bit SAR ADC and then wirelessly transmitted in real time to the external reader by a low-power on-off shift keying (OOK) transmitter. The proposed architecture consumes 9 mW and the chip area is 2 mm x 2.4 mm.
URI: http://dx.doi.org/10.1109/TCSI.2015.2471595
http://hdl.handle.net/11536/128257
ISSN: 1549-8328
DOI: 10.1109/TCSI.2015.2471595
期刊: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Volume: 62
Issue: 10
起始頁: 2445
結束頁: 2453
顯示於類別:期刊論文