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dc.contributor.authorHsieh, E. R.en_US
dc.contributor.authorChung, Steve S.en_US
dc.date.accessioned2016-03-28T00:04:19Z-
dc.date.available2016-03-28T00:04:19Z-
dc.date.issued2015-12-14en_US
dc.identifier.issn0003-6951en_US
dc.identifier.urihttp://dx.doi.org/10.1063/1.4938142en_US
dc.identifier.urihttp://hdl.handle.net/11536/129535-
dc.description.abstractThe evolution of gate-current leakage path has been observed and depicted by RTN signals on metal-oxide-silicon field effect transistor with high-k gate dielectric. An experimental method based on gate-current random telegraph noise (I-g-RTN) technique was developed to observe the formation of gate-leakage path for the device under certain electrical stress, such as Bias Temperature Instability. The results show that the evolution of gate-current path consists of three stages. In the beginning, only direct-tunnelling gate current and discrete traps inducing I-g-RTN are observed; in the middle stage, interaction between traps and the percolation paths presents a multi-level gate-current variation, and finally two different patterns of the hard or soft breakdown path can be identified. These observations provide us a better understanding of the gate-leakage and its impact on the device reliability. (C) 2015 AIP Publishing LLC.en_US
dc.language.isoen_USen_US
dc.titleThe understanding on the evolution of stress-induced gate leakage in high-k dielectric metal-oxide-field-effect transistor by random-telegraph-noise measurementen_US
dc.typeArticleen_US
dc.identifier.doi10.1063/1.4938142en_US
dc.identifier.journalAPPLIED PHYSICS LETTERSen_US
dc.citation.volume107en_US
dc.citation.issue24en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000367318600057en_US
dc.citation.woscount0en_US
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