Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Chen, Zong-Yi | en_US |
dc.contributor.author | Hung, Chung-Chih | en_US |
dc.date.accessioned | 2016-03-28T00:04:19Z | - |
dc.date.available | 2016-03-28T00:04:19Z | - |
dc.date.issued | 2015-12-01 | en_US |
dc.identifier.issn | 2156-3357 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/JETCAS.2015.2502167 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/129548 | - |
dc.description.abstract | This paper presents a power-efficient realization of a third-order continuous-time delta-sigma (CT - Delta Sigma) modulator with 3-bit time-domain flash quantizer (TDFQ) and data-weighted averaging (DWA) based on the shifter output and input. Using the time-domain quantizer can overcome design issues in low voltage supply during CMOS downscaling. The CT - Delta Sigma modulator uses the TDFQ instead of a voltage-domain quantizer to reduce power consumption. The proposed TDFQ solves the linearity problem of the delay-based voltage-to-time converter (VTC) without calibration circuit while also increasing the quantizer input range and saving energy. Moreover, in order to reduce the mismatch effects of a multibit DAC and achieve low power consumption, implementation of a low-power DWA circuit is proposed without using a digital adder to calculate pointer for controlling barrel shift circuit. This chip was fabricated in CMOS 90 nm process. The proposed CT - Delta Sigma modulator consumes 5.8 mW from 1.0 V and achieves peak SNDR of 65.3 dB over the 20 MHz bandwidth, which results in FOM_W = 96.3 fJ/level and FOM_S = 161 dB. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Analog-to-digital converter | en_US |
dc.subject | continuous-time | en_US |
dc.subject | data weighted averaging | en_US |
dc.subject | delta-sigma modulator | en_US |
dc.subject | low power | en_US |
dc.subject | time-domain flash quantizer | en_US |
dc.subject | voltage-to-time converter | en_US |
dc.title | A 5.8 mW Continuous-Time Delta Sigma Modulator With 20 MHz Bandwidth Using Time-Domain Flash Quantizer | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/JETCAS.2015.2502167 | en_US |
dc.identifier.journal | IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS | en_US |
dc.citation.spage | 574 | en_US |
dc.citation.epage | 583 | en_US |
dc.contributor.department | 電機資訊學士班 | zh_TW |
dc.contributor.department | Undergraduate Honors Program of Electrical Engineering and Computer Science | en_US |
dc.identifier.wosnumber | WOS:000367302600009 | en_US |
dc.citation.woscount | 0 | en_US |
Appears in Collections: | Articles |