低功耗互補式穿隧場效電晶體的設計與製作 (I)

Full metadata record

DC Field	Value	Language
dc.contributor.author	莊紹勳	zh_TW
dc.contributor.author	Chung Steve S	en_US
dc.date.accessioned	2016-03-28T08:17:22Z	-
dc.date.available	2016-03-28T08:17:22Z	-
dc.date.issued	2015	en_US
dc.identifier.govdoc	MOST104-2221-E009-059-MY2	zh_TW
dc.identifier.uri	http://hdl.handle.net/11536/129941	-
dc.identifier.uri	https://www.grb.gov.tw/search/planDetail?id=11566707&docId=467377	en_US
dc.description.sponsorship	科技部	zh_TW
dc.language.iso	zh_TW	en_US
dc.title	低功耗互補式穿隧場效電晶體的設計與製作 (I)	zh_TW
dc.title	Design and Fabrication of Low Power Complementary Tunneling FETs (I)	en_US
dc.type	Plan	en_US
dc.contributor.department	國立交通大學電子工程學系及電子研究所	zh_TW
Appears in Collections:	Research Plans