Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.date.accessioned | 2016-03-28T08:17:38Z | - |
| dc.date.available | 2016-03-28T08:17:38Z | - |
| dc.date.issued | 2015 | en_US |
| dc.identifier.govdoc | MOST104-2220-E009-007 | zh_TW |
| dc.identifier.uri | http://hdl.handle.net/11536/130271 | - |
| dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=11435864&docId=460658 | en_US |
| dc.description.sponsorship | 科技部 | zh_TW |
| dc.language.iso | zh_TW | en_US |
| dc.title | 以資料分析為導向之新型態電子設計自動化研究---總計畫暨子計畫三：利用特徵擷取技術應用於電路與佈局層級的智慧型電路表示法( II ) | zh_TW |
| dc.title | Smart Physical- and Schematic-Level Circuit Representation through Feature Extraction( II ) | en_US |
| dc.type | Plan | en_US |
| dc.contributor.department | 國立交通大學資訊工程學系（所） | zh_TW |
| Appears in Collections: | Research Plans | |
