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dc.contributor.author莊景德zh_TW
dc.contributor.authorChuang Ching-Teen_US
dc.date.accessioned2016-03-28T08:17:51Z-
dc.date.available2016-03-28T08:17:51Z-
dc.date.issued2015en_US
dc.identifier.govdocMOST103-2221-E009-202-MY3zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/130488-
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=11280266&docId=457663en_US
dc.description.sponsorship科技部zh_TW
dc.language.isozh_TWen_US
dc.title超高通道與解析度微大腦皮質訊號擷取系統晶片封裝的研發---子計畫三:超高通道與解析度腦神經訊號擷取電路設計佈局及功耗優化zh_TW
dc.titleCircuit/Physical Design and Power Optimization for Mega-Channel Ultra-High-Density Neural Signal Recording Circuitsen_US
dc.typePlanen_US
dc.contributor.department國立交通大學電子工程學系及電子研究所zh_TW
顯示於類別:研究計畫