完整后设资料纪录
DC 栏位 | 值 | 语言 |
---|---|---|
dc.contributor.author | 庄景德 | zh_TW |
dc.contributor.author | Chuang Ching-Te | en_US |
dc.date.accessioned | 2016-03-29T00:01:10Z | - |
dc.date.available | 2016-03-29T00:01:10Z | - |
dc.date.issued | 2016 | en_US |
dc.identifier.govdoc | MOST103-2221-E009-202-MY3 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/130854 | - |
dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=11721482&docId=479488 | en_US |
dc.description.sponsorship | 科技部 | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.title | 超高通道与解析度微大脑皮质讯号撷取系统晶片封装的研发---子计画三:超高通道与解析度脑神经讯号撷取电路设计布局及功耗优化 | zh_TW |
dc.title | Circuit/Physical Design and Power Optimization for Mega-Channel Ultra-High-Density Neural Signal Recording Circuits | en_US |
dc.type | Plan | en_US |
dc.contributor.department | 国立交通大学电子工程学系及电子研究所 | zh_TW |
显示于类别: | Research Plans |