完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.author | 柯明道 | zh_TW |
| dc.contributor.author | 陳柏宏 | zh_TW |
| dc.date.accessioned | 2016-12-20T03:56:47Z | - |
| dc.date.available | 2016-12-20T03:56:47Z | - |
| dc.date.issued | 2016 | en_US |
| dc.identifier.govdoc | MOST105-2221-E009-166 | zh_TW |
| dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=11887657&docId=487717 | en_US |
| dc.identifier.uri | http://hdl.handle.net/11536/131859 | - |
| dc.description.abstract | zh_TW | |
| dc.description.abstract | en_US | |
| dc.description.sponsorship | 科技部 | zh_TW |
| dc.language.iso | zh_TW | en_US |
| dc.subject | zh_TW | |
| dc.subject | en_US | |
| dc.title | 混合信號積體電路之核心設計技術-總計畫暨子計畫五：積體電路可靠度設計 | zh_TW |
| dc.title | Reliability Design for Mixed-Signal Integrated Circuits | en_US |
| dc.type | Plan | en_US |
| dc.contributor.department | 國立交通大學電子工程學系及電子研究所 | zh_TW |
| 顯示於類別： | 研究計畫 | |
