應用於工業物聯網之超低電壓末端元件及邊端計算系統設計關鍵技術-子計畫三：超低功耗終端記憶體架構及邊端計算閘道系統設計

Full metadata record

DC Field	Value	Language
dc.contributor.author	陳添福	zh_TW
dc.date.accessioned	2016-12-20T03:56:49Z	-
dc.date.available	2016-12-20T03:56:49Z	-
dc.date.issued	2016	en_US
dc.identifier.govdoc	MOST105-2221-E009-161-MY3	zh_TW
dc.identifier.uri	https://www.grb.gov.tw/search/planDetail?id=11893596&docId=489413	en_US
dc.identifier.uri	http://hdl.handle.net/11536/131905	-
dc.description.abstract		zh_TW
dc.description.abstract		en_US
dc.description.sponsorship	科技部	zh_TW
dc.language.iso	zh_TW	en_US
dc.subject		zh_TW
dc.subject		en_US
dc.title	應用於工業物聯網之超低電壓末端元件及邊端計算系統設計關鍵技術-子計畫三：超低功耗終端記憶體架構及邊端計算閘道系統設計	zh_TW
dc.title	Energy-Efficient Edge Memory Architecture and Swarm Gateway System for Edge-Computing Iiot	en_US
dc.type	Plan	en_US
dc.contributor.department	國立交通大學資訊工程學系（所）	zh_TW
Appears in Collections:	Research Plans