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dc.contributor.author崔秉鉞zh_TW
dc.contributor.author林炯源zh_TW
dc.date.accessioned2016-12-20T03:56:50Z-
dc.date.available2016-12-20T03:56:50Z-
dc.date.issued2016en_US
dc.identifier.govdocMOST105-2221-E009-133-MY3 zh_TW
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=11895349&docId=489903en_US
dc.identifier.urihttp://hdl.handle.net/11536/131922-
dc.description.abstract zh_TW
dc.description.abstract en_US
dc.description.sponsorship科技部 zh_TW
dc.language.isozh_TWen_US
dc.subject zh_TW
dc.subject en_US
dc.title應用於低功率電路之穿隧電晶體研究zh_TW
dc.titleA Study on Tunnel Fet for Low Power Integrated Circuiten_US
dc.typePlanen_US
dc.contributor.department國立交通大學電子工程學系及電子研究所 zh_TW
顯示於類別:研究計畫