Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Pearn, W. L. | en_US |
dc.contributor.author | Tai, Y. T. | en_US |
dc.date.accessioned | 2017-04-21T06:56:40Z | - |
dc.date.available | 2017-04-21T06:56:40Z | - |
dc.date.issued | 2016-10 | en_US |
dc.identifier.issn | 2156-3950 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/TCPMT.2016.2607781 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/132650 | - |
dc.description.abstract | Portable devices have been popularly used nowadays. Liquid crystal display driver integrated circuit is an essential component in portable devices in which gold bumping process is a critical interconnection technology. To enhance bargaining power and to reduce cost, group suppliers are commonly selected from multiple suppliers. For high-definition display devices, a very low fraction of defectives is the basic quality requirement in gold bumping processes. Unfortunately, conventional yield measurement methods for supplier selection no longer work since any sample of reasonable size probably contains no defective gold bump product items. In this paper, we propose a group supplier selection procedure for multiple suppliers with multiple-line processes that are quite common due to high demands in semiconductor industry. For various significance levels, the number of suppliers, the number of manufacturing lines, predetermined capability requirements, and sample sizes, different selected suppliers are suggested based on the multipleline yield index C-pk(M). In addition, the power comparisons between different methods are also discussed. For the illustration purpose, real-world applications in a gold bumping factory that is located in the Science-Based Industrial Park in Hsinchu, Taiwan, are included. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Gold bumping | en_US |
dc.subject | group selection | en_US |
dc.subject | multiple lines | en_US |
dc.subject | process capability | en_US |
dc.title | Group Supplier Selection for Multiple-Line Gold Bumping Processes | en_US |
dc.identifier.doi | 10.1109/TCPMT.2016.2607781 | en_US |
dc.identifier.journal | IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY | en_US |
dc.citation.volume | 6 | en_US |
dc.citation.issue | 10 | en_US |
dc.citation.spage | 1576 | en_US |
dc.citation.epage | 1581 | en_US |
dc.contributor.department | 工業工程與管理學系 | zh_TW |
dc.contributor.department | Department of Industrial Engineering and Management | en_US |
dc.identifier.wosnumber | WOS:000386224000015 | en_US |
Appears in Collections: | Articles |