完整後設資料紀錄
DC 欄位語言
dc.contributor.authorTrong-Hieu Tranen_US
dc.contributor.authorChao, Paul Chang-Poen_US
dc.contributor.authorChien, Ping-Chiehen_US
dc.date.accessioned2019-04-03T06:37:52Z-
dc.date.available2019-04-03T06:37:52Z-
dc.date.issued2016-09-01en_US
dc.identifier.issn1424-8220en_US
dc.identifier.urihttp://dx.doi.org/10.3390/s16091416en_US
dc.identifier.urihttp://hdl.handle.net/11536/132683-
dc.description.abstractThis study proposes a front-end readout circuit as an encoder chip for magneto-resistance (MR) linear scales. A typical MR sensor consists of two major parts: one is its base structure, also called the magnetic scale, which is embedded with multiple grid MR electrodes, while another is an MR reader stage with magnets inside and moving on the rails of the base. As the stage is in motion, the magnetic interaction between the moving stage and the base causes the variation of the magneto-resistances of the grid electrodes. In this study, a front-end readout IC chip is successfully designed and realized to acquire temporally-varying resistances in electrical signals as the stage is in motions. The acquired signals are in fact sinusoids and co-sinusoids, which are further deciphered by the front-end readout circuit via newly-designed programmable gain amplifiers (PGAs) and analog-to-digital converters (ADCs). The PGA is particularly designed to amplify the signals up to full dynamic ranges and up to 1 MHz. A 12-bit successive approximation register (SAR) ADC for analog-to-digital conversion is designed with linearity performance of +/- 1 in the least significant bit (LSB) over the input range of 0.5-2.5 V from peak to peak. The chip was fabricated by the Taiwan Semiconductor Manufacturing Company (TSMC) 0.35-micron complementary metal oxide semiconductor (CMOS) technology for verification with a chip size of 6.61 mm(2), while the power consumption is 56 mW from a 5-V power supply. The measured integral non-linearity (INL) is -0.79-0.95 LSB while the differential non-linearity (DNL) is -0.68-0.72 LSB. The effective number of bits (ENOB) of the designed ADC is validated as 10.86 for converting the input analog signal to digital counterparts. Experimental validation was conducted. A digital decoder is orchestrated to decipher the harmonic outputs from the ADC via interpolation to the position of the moving stage. It was found that the displacement measurement error is within +/- 15 mu m for a measuring range of 10 mm.en_US
dc.language.isoen_USen_US
dc.subjectmagnetic linear scalesen_US
dc.subjectencoder readout ICen_US
dc.subjectprogrammable gain amplifiers (PGAs)en_US
dc.subjectsuccessive approximation register (SAR) analog-to-digital converters (ADCs)en_US
dc.titleThe Front-End Readout as an Encoder IC for Magneto-Resistive Linear Scale Sensorsen_US
dc.typeArticleen_US
dc.identifier.doi10.3390/s16091416en_US
dc.identifier.journalSENSORSen_US
dc.citation.volume16en_US
dc.citation.issue9en_US
dc.citation.spage0en_US
dc.citation.epage0en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000385527700077en_US
dc.citation.woscount4en_US
顯示於類別:期刊論文


文件中的檔案:

  1. d315e0e1a655b9eb1ee8c2f2c6de0567.pdf

若為 zip 檔案,請下載檔案解壓縮後,用瀏覽器開啟資料夾中的 index.html 瀏覽全文。