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dc.contributor.authorShen, Wen-Weien_US
dc.contributor.authorChen, Kuan-Nengen_US
dc.date.accessioned2019-04-03T06:37:05Z-
dc.date.available2019-04-03T06:37:05Z-
dc.date.issued2017-01-19en_US
dc.identifier.issn1556-276Xen_US
dc.identifier.urihttp://dx.doi.org/10.1186/s11671-017-1831-4en_US
dc.identifier.urihttp://hdl.handle.net/11536/133029-
dc.description.abstract3D integration with through-silicon via (TSV) is a promising candidate to perform system-level integration with smaller package size, higher interconnection density, and better performance. TSV fabrication is the key technology to permit communications between various strata of the 3D integration system. TSV fabrication steps, such as etching, isolation, metallization processes, and related failure modes, as well as other characterizations are discussed in this invited review paper.en_US
dc.language.isoen_USen_US
dc.subjectThrough-silicon via (TSV)en_US
dc.subjectThree-dimensional integrated circuit (3D IC)en_US
dc.titleThree-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV)en_US
dc.typeArticleen_US
dc.identifier.doi10.1186/s11671-017-1831-4en_US
dc.identifier.journalNANOSCALE RESEARCH LETTERSen_US
dc.citation.volume12en_US
dc.citation.spage0en_US
dc.citation.epage0en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000392520900005en_US
dc.citation.woscount16en_US
Appears in Collections:Articles


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