完整後設資料紀錄
DC 欄位語言
dc.contributor.authorLyu, Rong-Jheen_US
dc.contributor.authorShie, Bo-Shiuanen_US
dc.contributor.authorLin, Horng-Chihen_US
dc.contributor.authorLi, Pei-Wenen_US
dc.contributor.authorHuang, Tiao-Yuanen_US
dc.date.accessioned2017-04-21T06:56:32Z-
dc.date.available2017-04-21T06:56:32Z-
dc.date.issued2017-03en_US
dc.identifier.issn0018-9383en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TED.2016.2646221en_US
dc.identifier.urihttp://hdl.handle.net/11536/133146-
dc.description.abstractWe report an exquisite, film- profileengineering approach for producing nanometer-scale channel-length (L) ZnO thin-film transistors (TFTs). The scheme is based on a unique laminated structure in conjunction with a well-designed etching process for building a slender, suspending bridge that shadows the subsequent deposition of pivotal thin films of ZnO and gate oxide as well as simultaneously defines L of the TFTs. With the approach, we have ingeniously downscaled L of ZnO TFTs to as short as 10 nm. The experimental ZnO TFTs of L = 50 and 30 nm, respectively, exhibit excellent performance in terms of high on/off current ratio of 7.9x10(7) and 4.2x10(7), superior subthreshold swing of 92 and 95 mV/decade, and small drain induced barrier lowering of 0.1 and 0.29 V/V. Remarkably the nanometerscale ZnO TFTs possess excellent device uniformity. Furthermore, the precise control over the geometrical sizes for the channel length enables the fabrication of ultrashort ZnO TFTs of L as short as 10 nm with reasonable gate transfer characteristics.en_US
dc.language.isoen_USen_US
dc.subjectFilm profile engineering (FPE)en_US
dc.subjectmetal oxide (MO)en_US
dc.subjectshort channel effects (SCEs)en_US
dc.subjectthin-film transistorsen_US
dc.subject(TFTs)en_US
dc.subjectZnOen_US
dc.titleDownscaling Metal-Oxide Thin-Film Transistors to Sub-50 nm in an Exquisite Film-Profile Engineering Approachen_US
dc.identifier.doi10.1109/TED.2016.2646221en_US
dc.identifier.journalIEEE TRANSACTIONS ON ELECTRON DEVICESen_US
dc.citation.volume64en_US
dc.citation.issue3en_US
dc.citation.spage1069en_US
dc.citation.epage1075en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000396056700049en_US
顯示於類別:期刊論文